Technical Field
The present invention generally relates to the formation of metal interconnects and, more particularly, to the nitridation of vias before such vias are filled with conductive material.
Description of the Related Art
Vias and other interconnects are formed in and through integrated chips to provide power and communication between components on the chips. Frequently these interconnects are made with copper wires that are formed in the bulk of an insulating material such as, e.g., silicon dioxide. However, when the interconnect metal is formed in direct contact with the insulating material, the interconnect material may diffuse into the dielectric material, degrading the performance (in particular, the conductivity) of the interconnect.
To address this problem, conventional fabrication processes deposit a liner of, e.g., tantalum nitride, between the interconnect and the bulk of the dielectric. The liner prevents the dispersion of interconnect material into the dielectric. However, different liner materials affect the resistance of the interconnect in different ways.